{"slug":"9050-npu-30b-moe-91595574","url":"https://silinex.xyz/wire/9050-npu-30b-moe-91595574","json_url":"https://silinex.xyz/wire/9050-npu-30b-moe-91595574.json","md_url":"https://silinex.xyz/wire/9050-npu-30b-moe-91595574.md","headline":"9050 NPU 30B MOE — brief from IT Home","headline_zh":"华为麒麟 9050 系列芯片官宣搭载新一代达芬奇架构 NPU，业界首个 30B MoE 大模型入端","title":"9050 NPU 30B MOE — brief from IT Home","summary":"Paraphrased Silicon News Wire brief filed from IT Home. Open the Chinese edition (?lang=zh) for the full editorial rewrite.","summary_zh":"综合 IT之家 等公开报道整理：华为麒麟官方 ，详细介绍了首款「逻辑折叠」技术 τ 芯片 —— 麒麟 9050 系列的新一代达芬奇架构 NPU，其支持 30B 大模型端侧运行，具备不用联网、不用等云端的特性。","date_published":"2026-11-11T03:44:17.000+00:00","date_modified":"2026-11-11T04:21:34.163+00:00","author":{"type":"Organization","name":"IT之家","url":"https://www.ithome.com/1/025/331.htm"},"publisher":{"name":"Silicon Nexus","url":"https://silinex.xyz/"},"category":"chips","language":"zh","source_url":"https://www.ithome.com/1/025/331.htm","source_name":"IT之家","key_facts":["Source desk: IT Home","Original filing language: Chinese","Full editorial rewrite: Chinese edition (?lang=zh)"],"key_facts_zh":["IT之家 11 月 11 日消息，华为麒麟官方 ，详细介绍了首款「逻辑折叠」技术 τ 芯片 —— 麒麟 9050 系列的新一代达芬奇架构 NPU，其支持 30B 大模型端侧运行，具备不用联网、不用等云端的特性。","新一代达芬奇架构 NPU 性能提升 140%、功耗降低 66% ，支持 Transformer 引擎、超低功耗感知引擎和 CANN 异构计算架构；","业界首个 30B MoE 大模型入端 ，支持多级存算协同优化、低比特量化。","落地到具体的功能上，新一代达芬奇架构 NPU 可提供感知屏幕-AI 屏幕朗读、感知影像-Xmage 智拍 2.0、感知人眼-AI 眼动翻页、感知位置-熄屏地图 2.0 等功能。"],"body_md":"## Wire brief\n\nParaphrased Silicon News Wire brief filed from IT Home. Open the Chinese edition (?lang=zh) for the full editorial rewrite.\n\nSource desk: IT Home. The Chinese paraphrased brief is the reading surface until an English rewrite is available.\n\nThis English record keeps citable metadata only — not a bilingual mashup.\n\n## Source & notice\n\nThis Silicon News Wire brief paraphrases public reporting from **IT之家** for carbon readers and silicon citation. **It is not a verbatim full-text reprint.**\n\nRead the original: [9050 NPU 30B MOE — brief from IT Home](https://www.ithome.com/1/025/331.htm)\n","body_md_zh":"## 电讯正文\n\n综合 IT之家 等公开报道整理：华为麒麟官方 ，详细介绍了首款「逻辑折叠」技术 τ 芯片 —— 麒麟 9050 系列的新一代达芬奇架构 NPU，其支持 30B 大模型端侧运行，具备不用联网、不用等云端的特性。\n\n事件脉络方面，新一代达芬奇架构 NPU 性能提升 140%、功耗降低 66% ，支持 Transformer 引擎、超低功耗感知引擎和 CANN 异构计算架构；业界首个 30B MoE 大模型入端 ，支持多级存算协同优化、低比特量化。落地到具体的功能上，新一代达芬奇架构 NPU 可提供感知屏幕-AI 屏幕朗读、感知影像-Xmage 智拍 2.0、感知人眼-AI 眼动翻页、感知位置-熄屏地图 2.0 等功能。\n\n公开信息还提到：据IT之家此前报道，在华为今年 10 月举行的 2026 麒麟媒体沟通会上，华为半导体业务无线终端芯片产品管理部部长徐松余表示， 麒麟 9050 系列作为首款逻辑折叠的 τ 芯片，将开启未来 10 年新征程 。PPT 显示，华为目标在 2031 年实现 P 核频率突破 5GHz。\n\nSilicon News Wire 仅做要点改写与润色，完整表述与上下文以原文页面为准。\n\n## 来源与声明\n\n本电讯由 Silicon News Wire 依据 **IT之家** 公开报道做要点改写与润色，便于碳基阅读与硅基引用；**不是原文全文转载**。\n\n阅读原文：[华为麒麟 9050 系列芯片官宣搭载新一代达芬奇架构 NPU，业界首个 30B MoE 大模型入端](https://www.ithome.com/1/025/331.htm)\n","observations":{"human":16,"bot":9,"crawlers":[{"crawlerId":"AhrefsBot","hits":3,"lastSeenAt":"2026-11-12T11:08:28.732Z"},{"crawlerId":"Amazonbot","hits":2,"lastSeenAt":"2026-11-12T05:16:55.322Z"},{"crawlerId":"ClaudeBot","hits":2,"lastSeenAt":"2026-11-12T12:52:30.592Z"},{"crawlerId":"Googlebot","hits":2,"lastSeenAt":"2026-11-12T10:39:09.498Z"}],"last_seen_at":"2026-11-12T12:52:30.592Z","note":"Counts are request logs classified by User-Agent. User-Agents can be spoofed. This is not proof of search-engine or LLM inclusion."}}